Citation
Simulation Based Cause and Effect analysis of Input Variables in Wafer Fabrication. In proceedings of the 7th Multidisciplinary International Conference on Scheduling : Theory and Applications (MISTA 2015), 25 - 28 Aug 2015, Prague, Czech Republic, pages 345-359, 2015.
Paper
Abstract
Controlling a re-entrant flow line typically found in the semiconductor wafer fabrication industry is complex. To obtain a fundamental understanding of the system and to evaluate the effects of different input variables on selected parameters such as cycle time, WIP (work-in-process) level and throughput, we construct a simulation model of Intel Mini-Fab using Arena simulation software. The Intel Mini Fab has been selected for this study as it captures the challenges involved in scheduling the highly re-entrant semiconductor wafer fabrication flow lines. The input variables include arrival rate, arrival distribution, processing time, maintenance schedule, operator’s schedule, batch size, dispatching rule and lot release control. Instigating this experimentation brings the major influencing variables and the most desirable lot release pattern.
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Bibtex
@INPROCEEDINGS{2015-345-359-P, author = {R. Singh and M. Mathirajan},
title = {Simulation Based Cause and Effect analysis of Input Variables in Wafer Fabrication},
booktitle = {In proceedings of the 7th Multidisciplinary International Conference on Scheduling : Theory and Applications (MISTA 2015), 25 - 28 Aug 2015, Prague, Czech Republic},
year = {2015},
editor = {Z. Hanzalek and G. Kendall and B. McCollum and P. Sucha},
pages = {345--359},
note = {Paper},
abstract = {Controlling a re-entrant flow line typically found in the semiconductor wafer fabrication industry is complex. To obtain a fundamental understanding of the system and to evaluate the effects of different input variables on selected parameters such as cycle time, WIP (work-in-process) level and throughput, we construct a simulation model of Intel Mini-Fab using Arena simulation software. The Intel Mini Fab has been selected for this study as it captures the challenges involved in scheduling the highly re-entrant semiconductor wafer fabrication flow lines. The input variables include arrival rate, arrival distribution, processing time, maintenance schedule, operator’s schedule, batch size, dispatching rule and lot release control. Instigating this experimentation brings the major influencing variables and the most desirable lot release pattern. },
owner = {Graham},
timestamp = {2017.01.16},
webpdf = {2015-345-359-P.pdf} }